Skadron Kevin
Location: (Charlottesville, VA)
Personal Research Web Page: http://www.cs.virginia.edu/~skadron
Keywords: Modeling/design for thermal, power, reliability, and variation constraints; dark silicon; and design, programming models, and benchmarking for highly parallel, GPU, and heterogeneous architectures, especially focusing on memory bandwidth and leveraging on-chip storage
Posted on: Monday, May 16th, 2011
Broad Research Area: Hardware / Architecture, Numerical/Scientific Computing / HPC / Data-Intensive Scalable Computing
Research Interests:
My research focuses on two main topics and their interdependence: the role of physical constraints in processor design, and the architecture of future multi/manycore platforms.
Despite continuing availability of plentiful transistors thanks to Moore’s Law, physical constraints—chiefly temperature, power delivery, energy efficiency, and reliability—now prevent straightforward scaling of processor performance. New design-time and run-time techniques are needed to address these limitations, as well as improved modeling and capabilities. Our group at UVA has a long track record of high impact work in these areas.
These physical constraints, combined with the memory wall, will constrain the types of designs that are possible, requiring both novel combinations of cores and novel memory hierarchies. Our group is exploring these issues, especially focusing on the memory hierarchy, how to organize cores around bandwidth limitations, requisite programming support, and how to incorporate these techniques within power, thermal, and reliability constraints.
Contact Information:
Please see http://www.cs.virginia.edu/~skadron
