Murali Annavaram
Location: (Los Angeles, CA)
Personal Research Web Page: http://www.usc.edu/dept/ee/scip
Keywords: 3D stacking, reliability, power performance and reliability tradeoffs, simulation and modeling of CPUs, architecture, microarchitecture, mobile computing, sensor systems, low power designs, data center efficiency,
Posted on: Friday, June 5th, 2009
Broad Research Area: Hardware / Architecture, Information Assurance / Security / Privacy / Cryptography, Mobile / Ubiquitous / Embedded Computing, Numerical/Scientific Computing / HPC / Data-Intensive Scalable Computing, Programming Languages / Compilers
Research Interests:
My research focuses on using 3D stacking to improve reliability in high performance processors. My research group also works on data center efficiency improvement issues primarily from the ICT infrastructure view point. I also work on energy efficient sensor management for body area networks for continuous and real time health monitoring.
Prior to my teaching career, I worked in industrial research labs for 6 years; first at the Intel Microprocessor Research Labs as a senior researcher for five years and then at the Nokia Research Center Palo Alto as a visiting research faculty for eight months. At Nokia my research focused on mobile platform services. At Intel my research focused on computer systems architecture spanning the entire computer system design space; from new silicon technologies at that hardware level to systems software analysis of server workloads.
Contact Information:
Email is best. But phone will work as well.
email obfuscated - click to reveal, 213-740-3299
